Hg/0.7/Cd/0.3/Te charge-coupled device shift registers

Using n-type Hg(0.7)Cd(0.3)Te, eight-bit charged-coupled device shift registers having electrodes 10 microns in length have been constructed. The devices have been tested between 77 and 140 K. Charge-transfer efficiency was measured with the input pulse turned down from the value that saturates the well. At 77 K a charge-transfer efficiency of 0.996 was obtained under four-phase operation in the 1-100 kHz clock-frequency range. The input signal was generated by pulsing an input gate beyond the tunnel breakdown limit during the phase-one potential well's on-time. A floating-gate output followed by a correlated double sampling was used for signal detection. It is noted that although the eight-bit shift register is too short for the optimization of clock voltages and the measurement of charge-transfer efficiency, longer shift registers are being designed.