Quadrature bandpass Delta capital sigma modulation for digital radio

A quadrature bandpass Delta capital sigma modulator IC facilitates monolithic digital-radio-receiver design by allowing straightforward `complex A/D conversion' of an image-reject mixer's I and Q outputs. Quadrature bandpass Delta capital sigma modulators provide superior performance over pairs of real bandpass Delta capital sigma modulators in the conversion of complex input signals, using complex filtering embedded in Delta capital sigma loops to efficiently realize asymmetric noise-shaped spectra. The fourth-order prototype IC, clocked at 10 MHz, converts narrowband 3.75-MHz I and Q inputs and attains a dynamic range of 67 dB in 200-kHz (GSM) bandwidth, increasing to 71 and 77 dB in 100- and 30-kHz bandwidths, respectively. Maximum signal-to-noise plus distortion ratio (SNDR) in 200-kHz bandwidth is 62 dB. Power consumption is 130 mW at 5 V. Die size in a 0.8- mu m CMOS process is 2.4x1.8 mm super(2).