Steep-slope hysteresis-free negative capacitance MoS2 transistors

The so-called Boltzmann tyranny defines the fundamental thermionic limit of the subthreshold slope of a metal–oxide–semiconductor field-effect transistor (MOSFET) at 60 mV dec −1 at room temperature and therefore precludes lowering of the supply voltage and overall power consumption 1 , 2 . Adding a...

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Veröffentlicht in:Nature nanotechnology 2018, Vol.13 (1), p.24-28
Hauptverfasser: Si, Mengwei, Su, Chun-Jung, Jiang, Chunsheng, Conrad, Nathan J., Zhou, Hong, Maize, Kerry D., Qiu, Gang, Wu, Chien-Ting, Shakouri, Ali, Alam, Muhammad A., Ye, Peide D.
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Sprache:eng
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Zusammenfassung:The so-called Boltzmann tyranny defines the fundamental thermionic limit of the subthreshold slope of a metal–oxide–semiconductor field-effect transistor (MOSFET) at 60 mV dec −1 at room temperature and therefore precludes lowering of the supply voltage and overall power consumption 1 , 2 . Adding a ferroelectric negative capacitor to the gate stack of a MOSFET may offer a promising solution to bypassing this fundamental barrier 3 . Meanwhile, two-dimensional semiconductors such as atomically thin transition-metal dichalcogenides, due to their low dielectric constant and ease of integration into a junctionless transistor topology, offer enhanced electrostatic control of the channel 4 – 12 . Here, we combine these two advantages and demonstrate a molybdenum disulfide (MoS 2 ) two-dimensional steep-slope transistor with a ferroelectric hafnium zirconium oxide layer in the gate dielectric stack. This device exhibits excellent performance in both on and off states, with a maximum drain current of 510 μA μm −1 and a sub-thermionic subthreshold slope, and is essentially hysteresis-free. Negative differential resistance was observed at room temperature in the MoS 2 negative-capacitance FETs as the result of negative capacitance due to the negative drain-induced barrier lowering. A high on-current-induced self-heating effect was also observed and studied. A field-effect MoS2 transistor with a negative capacitor in its gate shows stable, hysteresis-free performance characterized by a sub-thermionic sub-threshold slope.
ISSN:1748-3387
1748-3395
DOI:10.1038/s41565-017-0010-1