Reducing the Use of Resources in the FPGA Circuit of a Moore FSM

Reducing the Use of Resources in the FPGA Circuit of a Moore FSM

Two modifications of coding states of a Moore finite-state machine (FSM) are proposed. The modifications are based on pseudoequivalent states of the machine with a view to reducing the number of rows in the transition table of the machine and also on the use of free embedded memory blocks in impleme...

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Veröffentlicht in:Cybernetics and systems analysis 2013-11, Vol.49 (6), p.951-958
Hauptverfasser: Barkalov, A. A., Tytarenko, L. A., Malcheva, R. V., Soldatov, K. A.
Format: Artikel
Sprache:eng
Schlagworte:
Algorithms
Artificial Intelligence
Circuits
Codes
Coding
Computer Engineering
Control
Control algorithms
Cybernetics
Digital integrated circuits
Embedded systems
Field programmable gate arrays
Informatics
Mathematical models
Mathematics
Mathematics and Statistics
New Means of Cybernetics
Processor Architectures
Software Engineering/Programming and Operating Systems
Studies
Synthesis
Systems Analysis
Systems Theory
Tables (data)
Very-large-scale integration
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Beschreibung
Zusammenfassung:Two modifications of coding states of a Moore finite-state machine (FSM) are proposed. The modifications are based on pseudoequivalent states of the machine with a view to reducing the number of rows in the transition table of the machine and also on the use of free embedded memory blocks in implementing a system of microoperations. Synthesis methods for Moore FSMs are proposed. Research results are presented and appropriate application areas of the proposed methods are specified.
ISSN:1060-0396
1573-8337
DOI:10.1007/s10559-013-9586-0