UMH: A Hardware-Based Unified Memory Hierarchy for Systems with Multiple Discrete GPUs

In this article, we describe how to ease memory management between a Central Processing Unit (CPU) and one or multiple discrete Graphic Processing Units (GPUs) by architecting a novel hardware-based Unified Memory Hierarchy (UMH). Adopting UMH, a GPU accesses the CPU memory only if it does not find...

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Veröffentlicht in:ACM transactions on architecture and code optimization 2016-12, Vol.13 (4), p.1-25
Hauptverfasser: Ziabari, Amir Kavyan, Sun, Yifan, Ma, Yenai, Schaa, Dana, Abellán, José L., Ubal, Rafael, Kim, John, Joshi, Ajay, Kaeli, David
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Sprache:eng
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Zusammenfassung:In this article, we describe how to ease memory management between a Central Processing Unit (CPU) and one or multiple discrete Graphic Processing Units (GPUs) by architecting a novel hardware-based Unified Memory Hierarchy (UMH). Adopting UMH, a GPU accesses the CPU memory only if it does not find its required data in the directories associated with its high-bandwidth memory, or the NMOESI coherency protocol limits the access to that data. Using UMH with NMOESI improves performance of a CPU-multiGPU system by at least 1.92 × in comparison to alternative software-based approaches. It also allows the CPU to access GPUs modified data by at least 13 × faster.
ISSN:1544-3566
1544-3973
DOI:10.1145/2996190