Design of Addition/Subtraction for BIN/BCD Numbers

This paper aims to find a solution for a new design of binary / BCD adder / subtraction to increase the speed of operations and decrease the delays in signed numbers as well as the unsigned ones. A very important operation in mathematics for digital systems is adding binary/BCD numbers. Many different ways have been presented for addition and subtraction of BCD,this paper has presents no signbit numbers adder and subtractor many papers presented adder and subtractor for binary BCD numbers but all of them have some problems with their final assessment in this paper this problem is solved by adding EOP (end of operation signal). Here, a new design for addition or subtraction has been offered, without taking the signbit in BCD format that works perfectly.