A CMOS Bandgap Reference with Temperature Compensation
This paper has presented a bandgap reference circuit with high-order temperature compensation. The compensation technique is achieved by using MOS transistor operating in sub-threshold region for reducing high-order TC of Vbe. The circuit is designed in 0.18¦Ìm CMOS process. Simulation results show...
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| Veröffentlicht in: | Applied Mechanics and Materials 2014-10, Vol.667 (Advances in Computers, Electronics and Mechatronics), p.401-404 |
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| container_issue | Advances in Computers, Electronics and Mechatronics |
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| container_title | Applied Mechanics and Materials |
| container_volume | 667 |
| creator | Chen, Xi Shen, Xiao Feng Huang, Xing Fa Li, Liang Xu, Ming Yuan |
| description | This paper has presented a bandgap reference circuit with high-order temperature compensation. The compensation technique is achieved by using MOS transistor operating in sub-threshold region for reducing high-order TC of Vbe. The circuit is designed in 0.18¦Ìm CMOS process. Simulation results show that the proposed circuit achieves 4.2 ppm/¡æ with temperature from-55 to 125 ¡æ, which is only a third than that of first-order compensated bandgap reference. |
| doi_str_mv | 10.4028/www.scientific.net/AMM.667.401 |
| format | Article |
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The compensation technique is achieved by using MOS transistor operating in sub-threshold region for reducing high-order TC of Vbe. The circuit is designed in 0.18¦Ìm CMOS process. Simulation results show that the proposed circuit achieves 4.2 ppm/¡æ with temperature from-55 to 125 ¡æ, which is only a third than that of first-order compensated bandgap reference.</description><identifier>ISSN: 1660-9336</identifier><identifier>ISSN: 1662-7482</identifier><identifier>ISBN: 9783038352907</identifier><identifier>ISBN: 303835290X</identifier><identifier>EISSN: 1662-7482</identifier><identifier>DOI: 10.4028/www.scientific.net/AMM.667.401</identifier><language>eng</language><publisher>Zurich: Trans Tech Publications Ltd</publisher><subject>Circuits ; CMOS ; Energy gaps (solid state) ; MOS devices ; Semiconductor devices ; Simulation ; Temperature compensation ; Transistors</subject><ispartof>Applied Mechanics and Materials, 2014-10, Vol.667 (Advances in Computers, Electronics and Mechatronics), p.401-404</ispartof><rights>2014 Trans Tech Publications Ltd</rights><rights>Copyright Trans Tech Publications Ltd. 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The circuit is designed in 0.18¦Ìm CMOS process. Simulation results show that the proposed circuit achieves 4.2 ppm/¡æ with temperature from-55 to 125 ¡æ, which is only a third than that of first-order compensated bandgap reference.</description><subject>Circuits</subject><subject>CMOS</subject><subject>Energy gaps (solid state)</subject><subject>MOS devices</subject><subject>Semiconductor devices</subject><subject>Simulation</subject><subject>Temperature compensation</subject><subject>Transistors</subject><issn>1660-9336</issn><issn>1662-7482</issn><issn>1662-7482</issn><isbn>9783038352907</isbn><isbn>303835290X</isbn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2014</creationdate><recordtype>article</recordtype><sourceid>BENPR</sourceid><recordid>eNqNkF1LwzAUhoMfoM79h4Ig3rRLmzRNbsRZ_IKNgc7rkKWnrmNLZ5JS_PdmTlC88uoE3of3nDwIXaY4oTjjo77vE6cbML6pG50Y8KPxdJowVoQ8PUCnKWNZXFCeHaKhKDjBhJM8E7g4-spwLAhhJ-jMuRXGjKaUnyI2jsrp7CW6VaZ6U9voGWqwYDREfeOX0Rw2W7DKdxaisg1v45RvWnOOjmu1djD8ngP0en83Lx_jyezhqRxPYk0y7mONdcapEDVQoZRIqwwIqWhOcswF1Xqh81pQwajGlVIsr9hCYA6cMpEXUAsyQFf73q1t3ztwXm4ap2G9VgbazsmUMxq-yFka0Is_6KrtrAnXBYoUOGeFyAJ1vae0bZ2zUMutbTbKfsgUy51mGTTLH80yaJZBswyaQ75bc7Mv8FYZ50Evf-35X8UnltGKXw</recordid><startdate>20141001</startdate><enddate>20141001</enddate><creator>Chen, Xi</creator><creator>Shen, Xiao Feng</creator><creator>Huang, Xing Fa</creator><creator>Li, Liang</creator><creator>Xu, Ming Yuan</creator><general>Trans Tech Publications Ltd</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SR</scope><scope>7TB</scope><scope>8BQ</scope><scope>8FD</scope><scope>8FE</scope><scope>8FG</scope><scope>ABJCF</scope><scope>ABUWG</scope><scope>AFKRA</scope><scope>BENPR</scope><scope>BFMQW</scope><scope>BGLVJ</scope><scope>CCPQU</scope><scope>D1I</scope><scope>DWQXO</scope><scope>FR3</scope><scope>HCIFZ</scope><scope>JG9</scope><scope>KB.</scope><scope>KR7</scope><scope>L6V</scope><scope>M7S</scope><scope>PDBOC</scope><scope>PQEST</scope><scope>PQQKQ</scope><scope>PQUKI</scope><scope>PRINS</scope><scope>PTHSS</scope></search><sort><creationdate>20141001</creationdate><title>A CMOS Bandgap Reference with Temperature Compensation</title><author>Chen, Xi ; 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The compensation technique is achieved by using MOS transistor operating in sub-threshold region for reducing high-order TC of Vbe. The circuit is designed in 0.18¦Ìm CMOS process. Simulation results show that the proposed circuit achieves 4.2 ppm/¡æ with temperature from-55 to 125 ¡æ, which is only a third than that of first-order compensated bandgap reference.</abstract><cop>Zurich</cop><pub>Trans Tech Publications Ltd</pub><doi>10.4028/www.scientific.net/AMM.667.401</doi><tpages>4</tpages></addata></record> |
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| identifier | ISSN: 1660-9336 |
| ispartof | Applied Mechanics and Materials, 2014-10, Vol.667 (Advances in Computers, Electronics and Mechatronics), p.401-404 |
| issn | 1660-9336 1662-7482 1662-7482 |
| language | eng |
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| source | Scientific.net Journals |
| subjects | Circuits CMOS Energy gaps (solid state) MOS devices Semiconductor devices Simulation Temperature compensation Transistors |
| title | A CMOS Bandgap Reference with Temperature Compensation |
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