Polyphase Channelizer Demystified [Lecture Notes]

Since the late 1970s, numerous instances of design and applications of channelizers or channelization receivers have been widely reported. With the advent of high-speed field programmable gate arrays, new-generation architectures for implementation with reduced hardware have emerged in the past deca...

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Veröffentlicht in:IEEE signal processing magazine 2016-01, Vol.33 (1), p.144-150
Hauptverfasser: Krishna, P. Murali, Babu, T.P. Sameer
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description Since the late 1970s, numerous instances of design and applications of channelizers or channelization receivers have been widely reported. With the advent of high-speed field programmable gate arrays, new-generation architectures for implementation with reduced hardware have emerged in the past decade. However, these discrete processing techniques have evolved independently of the classical analog techniques, which were used until a generation earlier. These digital processing methods are not the digitized forms of their analog counterparts and are far superior in performance and flexibility in comparison to the legacy systems. Most of the reported literature in this area requires a level of analytical comprehension that may be too demanding for a student at an entry level in the subject. Keeping this in mind, we are, in this lecture note, presenting an alternative graphical analysis of a polyphase channelizer with a four-channel case study.
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subjects Channelizers
Delays
Digital signal processing
Evolution
Finite impulse response filters
Flexibility
Frequency division multiplexing
Hardware
High speed
Integrated circuits
Legacy
Mathematical analysis
Programmable logic controllers
Receivers
Students
title Polyphase Channelizer Demystified [Lecture Notes]
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