Four‐bit reconfigurable discriminator for frequency identification receivers: A building block approach

This paper presents a building block approach to design a reconfigurable discriminator (RD), which is the core circuit in frequency identification receivers. The RD is used to identify an unknown signal; the output of the circuit determines a frequency subband where the unknown signal falls into. The proposed building block design approach is scalable and can be used to produce any multibit RD. This design approach can be used to produce RD circuits with more or less resolution for a fixed band of operation, according to the number of bits used for a given design. The building block approach is demonstrated through the design of a 4‐bit RD. This design is a two‐port device that provides a series readout and can produce 4 bits for frequency identification. The device operates from 1 to 4 GHz, implemented by microstrip lines and PIN diode switches. Simulated and measured responses are in agreement. Key Points Building block approach to produce any multibit reconfigurable frequency measurement circuit This method is scalable