A class-C VCO based ∑-△ fraction-N frequency synthesizer with AFC for 802.11ah applications

A 1.4-2 GHz phase-locked loop (PLL) ∑-△ fraction-N frequency synthesizer with automatic fre- quency control (AFC) for 802.1 lah applications is presented. A class-C voltage control oscillator (VCO) ranging from 1.4 to 2 GHz is integrated on-chip to save power for the sub-GHz band. A novel AFC algori...

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Veröffentlicht in:Journal of semiconductors 2015-09, Vol.36 (9), p.115-120
1. Verfasser: 俞小宝 韩思阳 靳宗明 王志华 池保勇
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Sprache:eng
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Zusammenfassung:A 1.4-2 GHz phase-locked loop (PLL) ∑-△ fraction-N frequency synthesizer with automatic fre- quency control (AFC) for 802.1 lah applications is presented. A class-C voltage control oscillator (VCO) ranging from 1.4 to 2 GHz is integrated on-chip to save power for the sub-GHz band. A novel AFC algorithm is introduced to maintain the VCO oscillation at the start-up and automatically search for the appropriate control word of the switched-capacitor array to extend the PLL tuning range. A 20-bit third-order ∑-△ modulator is utilized to reduce the fraction spurs while achieving a frequency resolution that is lower than 30 Hz. The measurement results show that the frequency synthesizer has achieved a phase noise of 〈 -120 dBc/Hz at 1 MHz offset and consumes 11.1 mW from a 1.7 V supply. Moreover, compared with the traditional class-A counterparts, the phase noise in class-C mode has been improved by 5 dB under the same power consumption.
ISSN:1674-4926
DOI:10.1088/1674-4926/36/9/095003