4x, 3-level, blind ADC-based receiver

4x, 3-level, blind ADC-based receiver

The design of a 4x blind analogue-to-digital converter (ADC)-based receiver implemented in 65 nm CMOS technology is presented. The ADC, which has three levels with two adjustable thresholds, effectively implements a speculative decision-feedback equaliser. By reducing the ADC resolution and by simpl...

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Veröffentlicht in:Electronics letters 2015-04, Vol.51 (7), p.551-553
Hauptverfasser: Kovacevic, N, Jalali, M S, Liang, J, Ting, C, Sheikholeslami, A, Kibune, M, Tamura, H
Format: Artikel
Sprache:eng
Schlagworte:
Adjustable
Blinds
Channels
Consumption
Data recovery
Jitter
Noise levels
Receivers
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Zusammenfassung:The design of a 4x blind analogue-to-digital converter (ADC)-based receiver implemented in 65 nm CMOS technology is presented. The ADC, which has three levels with two adjustable thresholds, effectively implements a speculative decision-feedback equaliser. By reducing the ADC resolution and by simplifying the digital clock and data recovery design, the power consumption is reduced by a factor of 2 compared with previous works. Measurement results confirm a bit error rate of
ISSN:0013-5194
1350-911X
DOI:10.1049/el.2014.4441