Defect Level Constrained Optimization of Analog and Radio Frequency Specification Tests

The objective of this work is to minimize testing cost of analog and RF circuits for which complete specification tests are available. We use an integer linear program (ILP) to eliminate as many tests as possible without exceeding the required defect level. The method leverages correlation among specifications, thereby avoiding the tests for specifications that are sufficiently covered by tests for other specifications. First, Monte Carlo simulation determines probabilities for each test covering all other specifications it was not originally intended for. These probabilities and the given defect level then define an ILP model for eliminating unnecessary tests. An hypothetical example illustration of ten specifications demonstrates that depending on the defect level requirement up to half of the tests may be eliminated. Monte Carlo simulation using spice for probabilistic characterization of tests versus specifications followed by ILP optimization for two commercially available integrated circuits, an operational amplifier and a radio frequency power controller (RFPC), are presented as evidence of effectiveness of the technique.