A Low-Power, Dual-Wavelength Photoplethysmogram (PPG) SoC With Static and Time-Varying Interferer Removal

A Low-Power, Dual-Wavelength Photoplethysmogram (PPG) SoC With Static and Time-Varying Interferer Removal

This paper presents a low-power, reflectance-mode photoplethysmogram (PPG) front end with up to 100 μA of static interferer current removal and 87 dB attenuation of time-varying interferers. The chip nominally consumes 425 μW including signal chain circuits, red and IR LED drive power, clocks, digit...

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Veröffentlicht in:IEEE transactions on biomedical circuits and systems 2015-08, Vol.9 (4), p.581-589
Hauptverfasser: Winokur, Eric S., O'Dwyer, Tom, Sodini, Charles G.
Format: Artikel
Sprache:eng
Schlagworte:
Attenuation
Chains
Circuits
Clocks
Dynamic range
Harmonic analysis
Humans
Interferer
Light emitting diodes
low-power
mixed-signal
Models, Theoretical
Noise
Noise levels
Photodiodes
Photons
photoplethysmogram (PPG)
Photoplethysmography - methods
Power consumption
Power harmonic filters
System-on-chip
wearable devices
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Beschreibung
Zusammenfassung:This paper presents a low-power, reflectance-mode photoplethysmogram (PPG) front end with up to 100 μA of static interferer current removal and 87 dB attenuation of time-varying interferers. The chip nominally consumes 425 μW including signal chain circuits, red and IR LED drive power, clocks, digitization and I/O. Measured data shows the noise of the PPG signal to be dominated by the photodiode sensor photon shot noise.
ISSN:1932-4545
1940-9990
DOI:10.1109/TBCAS.2014.2358673