A novel DSP-based PFC-DPLL with fuzzy controlled acquisition aid to improve acquisition performance and noise immunity

Summary This paper proposes a new digital signal processing (DSP)‐based phase frequency controlled digital phase locked loop. Here, a very simplistic form of fuzzy logic controller with the help of carrier phase and frequency error as input data is used to provide an acquisition aid. A frequency discriminator is employed to generate frequency error, and phase detector output is taken for phase error. This addition of an acquisition aid helps the loop to achieve the minimum acquisition time and maximum noise rejection simultaneously. An additional phase control in the digitally controlled oscillator makes the loop perform even better towards this goal. The implementation of the proposed loop is carried out on a reconfigurable logic platform using System Generator®;, a tool from Xilinx®; used to design real‐time DSP application. A significant improvement of time domain characteristics are observed as well as the performance in presence of additive white Gaussian noise is demonstrated in terms of the reduction in steady‐state phase jitter and enhancement in output signal to noise ratio in the proposed loop. Copyright © 2014 John Wiley & Sons, Ltd. A new DSP–based phase frequency controlled digital phase locked loop is presented in this paper. A fuzzy logic controller as an acquisition aid and an additional phase control in the digitally controlled oscillator are introduced in the loop to achieve minimum acquisition time and maximum noise rejection simultaneously. Hardware simulation of the proposed loop, using System Generator, a tool from Xilinx, shows a significant improvement in time domain response and phase jitter performance over its other counterparts.