Reducing the nano-scale defect formation of atomic-layer-deposited SrTiO3 films by adjusting the cooling rate of the crystallization annealing of the seed layer

SrTiO3 (STO) thin films, grown by atomic layer deposition (ALD), were studied for capacitors in dynamic random access memory. The STO ALD process consisted of two steps: the growth of seed layer followed by a rapid thermal annealing (RTA) process at 650°C to crystallize it, and the deposition of the main layer on top of the seed layer at 370°C to induce the in-situ crystallization. During single cooling process after the RTA of the seed layer, voids and nano-cracks were formed due to the thermal expansion mismatch between STO film and Si substrate. This problem was well mitigated by adopting the stepwise cooling process, wherein the holding time of 30s at 500, 350, and 200°C suppressed the defect formation in the seed layer. Therefore, the main layer grown on that seed layer showed an improved microstructure with a high bulk dielectric constant of 135. However, the increase in total annealing time degraded the interface quality between the STO and the bottom electrode, which finally worsened the insulating property. As a result, the minimum equivalent oxide thicknesses with low leakage current densities (