Design optimizations of phase noise, power consumption and frequency tuning for VCO
To meet the requirements of the low power Zigbee system, VCO design optimizations of phase noise, power consumption and frequency tuning are discussed in this paper. Both flicker noise of tail bias transistors and up-conversion of flicker noise from cross-coupled pair are reduced by improved self-sw...
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Veröffentlicht in: | Journal of semiconductors 2013-09, Vol.34 (9), p.143-148 |
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Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | To meet the requirements of the low power Zigbee system, VCO design optimizations of phase noise, power consumption and frequency tuning are discussed in this paper. Both flicker noise of tail bias transistors and up-conversion of flicker noise from cross-coupled pair are reduced by improved self-switched biasing technology, leading to low close-in phase noise. Low power is achieved by low supply voltage and triode region biasing. To linearly tune the frequency and get constant gain, distributed varactor structure is adopted. The proposed VCO is fabricated in SMIC 0.18-#m CMOS process. The measured linear tuning range is from 2.38 to 2.61 GHz. The oscillator exhibits low phase noise of-77.5 dBc/Hz and -122.8 dBc/Hz at l0 kHz and 1 MHz offset, respectively, at 2.55 GHz oscillation frequency while dissipating 2.7 mA from 1.2 V supply voltage, which well meet design specifications. |
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ISSN: | 1674-4926 |
DOI: | 10.1088/1674-4926/34/9/095009 |