Dynamic gate and substrate control charge pump circuits: a review

The article presents a study of different control technique based charge pump (CP) circuits for non-volatile memories. Dynamic gate control, substrate control and simultaneous dynamic gate with substrate control configurations are projected for enhancing the performance of conventional Dickson CP. Dynamic gate control reduces ON resistance of the charge transfer MOSFETs and charge is pumped with negligible loss. While substrate control removes substrate bias effect and improves voltage gain by controlling substrate voltage. Simultaneous gate and substrate control attains higher voltage gain by making CP circuit free of threshold voltage drop, substrate bias effect and providing lower ON resistance. However, the voltage gain is limited as clock level is constant for all the stages. To overcome this issue, a novel clock level shifting method is proposed and adapted in the dynamic gate and substrate control based CP. The voltage gain is improved as level shifters are used to increase the voltage level of clock pulses applied to the successive stages. Each control topology based four-stage CP circuits are designed and simulated in 0.18-μm standard CMOS technology. A detailed comparison of the CP circuit schemes is carried out in terms of parameters voltage gain, power efficiency, maximum output current, operating voltage range and operating frequency range. Simulation results show that the proposed CP provides maximum output voltage of 10.8 with 1.8 V supply voltage and lowest rise time of 14 µs.