Design of an ADALINE Adaptive Filter Based Noise Cancellation Based on Fine-Grained Pipelines

In this paper, a design of an ADALINE adaptive filter based noise cancellation based on fine-grained pipelines is presented. The circuit is implemented from 32-bit floating-point arithmetic function units which are partitioned into proper fine-grained pipeline stages. Fine-grained pipeline resource-sharing is performed to minimize the circuit size. The ADALINE adaptive filter is implemented on an FPGA （Xilinx SPARTAN-3 XC3S400） to perform power line noise reduction. The performance was also evaluated. The proposed fine-grained pipelines implementation achieved much higher throughput than the implementation on a commercial DSP chip, and two times higher than the conventional pipeline implementation.