Verification of Stack Manipulation in the Scalable Configurable Instrument Processor
This article describes a formal approach to the specification and verification of a microprocessor design and presents a case study of applying this technique to the Scalable Configurable Instrument Processor. These activities greatly increase confidence that the microprocessor correctly implements...
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Veröffentlicht in: | Johns Hopkins APL technical digest 2013-09, Vol.32 (2), p.465-475 |
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Format: | Artikel |
Sprache: | eng |
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Online-Zugang: | Volltext |
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Zusammenfassung: | This article describes a formal approach to the specification and verification of a microprocessor design and presents a case study of applying this technique to the Scalable Configurable Instrument Processor. These activities greatly increase confidence that the microprocessor correctly implements its intended functionality. In addition, the formal specification of the processor's functionality provides the basis for future work verifying the correctness of software. |
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ISSN: | 0270-5214 |