Formation of Ultra Shallow p super(+)/n Junction in Silicon Using a Combination of Low-Temperature Solid Phase Epitaxy and Non-Melt Double-Pulsed Green Laser Annealing

MOSFETs scaling-down is an effective way to attain high-performance CMOS operating with lower power and leakage current. However, short channel effects have become a serious problem due to the shortening of channel length. One of the promising methods to suppress this problem is by forming a shallow, highly doped and activated source/drain extension region. Fabricating ultra shallow p super(+)/n junction is difficult due to the channeling of boron ions and anomalous boron diffusion during fabrication processes. A combination of Ge pre-amorphization implantation, low-energy boron implantation and two-step annealing, involving low-temperature solid phase epitaxy preannealing followed by non-melt laser annealing was used for forming ultra shallow p super(+)/n junction in silicon. The physical relationship among the regrowth of implanted layer, boron activation and diffusion, and leakage current is investigated. We have succeeded in forming ultra shallow p super(+)/n junction with junction depth of 8 nm and sheet resistance of 920 [Omega]/[whitesquare].