Electroforming and resistive switching in silicon dioxide resistive memory devices

Electroforming and resistive switching in SiO 2 materials are investigated by controlling the annealing temperature, etching time and operating ambient. Thermal anneal in reducing ambient lowers electroforming voltage to 10 nm from the electrode edge in devices with continuous SiO 2 layers. Switching unpassivated devices fails in 1 atm air and pure O 2 /N 2 , with the recovery of vacuum switching at ∼4.6 V after switching attempts in O 2 /N 2 and at ∼9.5 V after switching attempts in air. Incorporating a hermetic passivation layer enables switching in 1 atm air. Discussions of defect energetics and electrochemical reactions lead to a localized switching model describing device switching dynamics. Low-frequency noise data are consistent with charge transport through electron-trapping defects. Low-resistance-state current for