A high-speed, 240-frames/s, 4.1-Mpixel CMOS sensor

A high-speed, 240-frames/s, 4.1-Mpixel CMOS sensor

This paper describes a large-format 4-Mpixel (2352/spl times/1728) sensor with on-chip parallel 10-b analog-to-digital converters (ADCs). The chip size is 20/spl times/20 mm with a 7-/spl mu/m pixel pitch. At a 66-MHz master clock rate and 3.3-V operating voltage, it achieves a high frame rate of 24...

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Veröffentlicht in:IEEE transactions on electron devices 2003-01, Vol.50 (1), p.130-135
Hauptverfasser: Krymski, A.I., Bock, N.E., Nianrong Tu, Van Blerkom, D., Fossum, E.R.
Format: Artikel
Sprache:eng
Schlagworte:
Analog-digital conversion
Clocks
CMOS
Electric potential
Frames
High speed
Integrated circuit noise
Power dissipation
Sensors
Voltage
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Beschreibung
Zusammenfassung:This paper describes a large-format 4-Mpixel (2352/spl times/1728) sensor with on-chip parallel 10-b analog-to-digital converters (ADCs). The chip size is 20/spl times/20 mm with a 7-/spl mu/m pixel pitch. At a 66-MHz master clock rate and 3.3-V operating voltage, it achieves a high frame rate of 240 frames/s delivering 9.75 Gb/s of data with power dissipation of less than 700 mW. The principal architectural features of the sensor are discussed along with the results of sensor characterization.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2002.806961