A Single-40 Gb/s Dual-20 Gb/s Serializer IC With SFI-5.2 Interface in 65 nm CMOS

This paper presents a 40 Gb/s serializer IC in 65 nm bulk CMOS technology. The IC has an SFI5.2-compliant 10 Gb/s input interface and supports two different output modes, single 40 Gb/s for OC-768 VSR and dual 20 Gb/s for DQPSK. The IC is evaluated on a PCB and error-free operation is confirmed. The...

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Veröffentlicht in:	IEEE journal of solid-state circuits 2009-12, Vol.44 (12), p.3580-3589
Hauptverfasser:	Kanda, K., Tamura, H., Yamamoto, T., Matsubara, S., Kibune, M., Doi, Y., Shibasaki, T., Tzartzanis, N., Kristensson, A., Parikh, S., Ide, S., Tsunoda, Y., Yamabana, T., Sugawara, M., Kuwata, N., Ikeuchi, T., Ogawa, J., Walker, W.W.
Format:	Artikel
Sprache:	eng
Schlagworte:	40 Gb/s 65 nm CMOS Chips Circuit boards Circuit testing Circuits CMOS CMOS integrated circuits CMOS technology Consumption DQPSK Error-free operation Integrated circuits Laboratories OC-768 Optical fiber networks Optical receivers Paper technology Power supplies Printed circuits SFI5.2 Transponders
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Zusammenfassung:	This paper presents a 40 Gb/s serializer IC in 65 nm bulk CMOS technology. The IC has an SFI5.2-compliant 10 Gb/s input interface and supports two different output modes, single 40 Gb/s for OC-768 VSR and dual 20 Gb/s for DQPSK. The IC is evaluated on a PCB and error-free operation is confirmed. The chip consumes 1.8 W for the 40 G mode, and 1.6 W for the 20 G mode from 1.2 V and 3.3 V power supplies.
ISSN:	0018-9200 1558-173X
DOI:	10.1109/JSSC.2009.2031030