A High-Power Broadband Passive Terahertz Frequency Doubler in CMOS

To realize a high-efficiency terahertz signal source, a varactor-based frequency-doubler topology is proposed. The structure is based on a compact partially coupled ring that simultaneously achieves isolation, matching, and harmonic filtering for both input and output signals at f 0 and 2 f 0 . The optimum varactor pumping/loading conditions for the highest conversion efficiency are also presented analytically along with intuitive circuit representations. Using the proposed circuit, a passive 480-GHz frequency doubler with a measured minimum conversion loss of 14.3 dB and an unsaturated output power of 0.23 mW is reported. Within 20-GHz range, the fluctuation of the measured output power is less than 1.5 dB, and the simulated 3-dB output bandwidth is 70 GHz (14.6%). The doubler is fabricated using 65-nm low-power bulk CMOS technology and consumes near zero dc power.