Electrical characteristics of 20-nm junctionless Si nanowire transistors
We have fabricated n-channel junctionless nanowire transistors with gate lengths in the range of 20–250nm, and have compared their electrical performances with conventional inversion-mode nanowire transistors. The junctionless tri-gate transistor with a gate length of 20nm showed excellent electrica...
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Veröffentlicht in: | Solid-state electronics 2012-07, Vol.73, p.7-10 |
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Hauptverfasser: | , , , , , , , , , |
Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | We have fabricated n-channel junctionless nanowire transistors with gate lengths in the range of 20–250nm, and have compared their electrical performances with conventional inversion-mode nanowire transistors. The junctionless tri-gate transistor with a gate length of 20nm showed excellent electrical characteristics with a high Ion/Ioff ratio (>106), good subthreshold slope (∼79mV/dec), and low drain-induced barrier lowering (∼10mV/V). The simpler fabrication process without junction formation results in improved short-channel characteristics compared to the inversion-mode devices, and also makes the junctionless nanowire transistor a promising candidate for sub 22-nm technology nodes. |
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ISSN: | 0038-1101 1879-2405 |
DOI: | 10.1016/j.sse.2011.11.032 |