CMOS without doping: Multi-gate silicon-nanowire field-effect-transistors
► Dopant-free CMOS multi-gate silicon-nanowire FET logic SOI technology. ► Device type (i.e. PMOS or NMOS) simply selected via back-gate voltage. ► Superior temperature hardness with low leakage currents. ► Freely voltage-configurable CMOS logic via back-bias selection. ► Provides additional flexibi...
Gespeichert in:
Veröffentlicht in: | Solid-state electronics 2012-04, Vol.70, p.33-38 |
---|---|
Hauptverfasser: | , , |
Format: | Artikel |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | ► Dopant-free CMOS multi-gate silicon-nanowire FET logic SOI technology. ► Device type (i.e. PMOS or NMOS) simply selected via back-gate voltage. ► Superior temperature hardness with low leakage currents. ► Freely voltage-configurable CMOS logic via back-bias selection. ► Provides additional flexibility in integrated circuit design for reconfigurable logic.
In this paper, we report on the fabrication and characterization of voltage configurable nanowire field-effect-transistor (NWFET) devices suitable to broaden the flexibility in circuit design, e.g. for reconfigurable logic. Silicon NW-structures with mid-gap Schottky source and drain (S/D) junctions on silicon-on-insulator (SOI) substrate have been fabricated as unipolar complementary metal–oxide–semiconductor (CMOS) transistors. The desired device type, i.e. NMOS or PMOS, is selected by applying an appropriate back-gate bias. The programming capabilities of the devices fabricated using this approach are demonstrated experimentally using a freely configurable CMOS-NWFET inverter circuit on a MultiSOI-substrate like set-up. |
---|---|
ISSN: | 0038-1101 1879-2405 |
DOI: | 10.1016/j.sse.2011.11.011 |