Improved MOSFET characterization technique for single channel length, scaled transistors
•Proposes correction to standard linear charge model to improve fitting at low Vgt.•Allows mobility, threshold voltage and Rsd extraction.•Applicable to scaled, single Lg transistors. The MOSFET characterization technique proposed here permits parameter extraction from ultra-short channel single len...
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| Veröffentlicht in: | Solid-state electronics 2015-02, Vol.104, p.44-46 |
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| container_title | Solid-state electronics |
| container_volume | 104 |
| creator | Ferdousi, Fahmida Rios, Rafael Kuhn, Kelin J. |
| description | •Proposes correction to standard linear charge model to improve fitting at low Vgt.•Allows mobility, threshold voltage and Rsd extraction.•Applicable to scaled, single Lg transistors.
The MOSFET characterization technique proposed here permits parameter extraction from ultra-short channel single length devices. The technique is based on an improved charge correction which allows extension of the gate overdrive to lower range and leads to better accuracy of extracted quantities such as effective mobility, threshold voltage, and effective parasitic resistance. The method is applicable to both planar and non-planar technologies at highly scaled gate lengths. |
| doi_str_mv | 10.1016/j.sse.2014.10.010 |
| format | Article |
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The MOSFET characterization technique proposed here permits parameter extraction from ultra-short channel single length devices. The technique is based on an improved charge correction which allows extension of the gate overdrive to lower range and leads to better accuracy of extracted quantities such as effective mobility, threshold voltage, and effective parasitic resistance. The method is applicable to both planar and non-planar technologies at highly scaled gate lengths.</description><subject>Channels</subject><subject>Charge</subject><subject>Devices</subject><subject>Extraction</subject><subject>Gates</subject><subject>Mobility</subject><subject>MOSFETs</subject><subject>Nonlinear charge</subject><subject>Semiconductor devices</subject><subject>Source–drain resistance</subject><subject>Threshold voltage</subject><subject>Transistors</subject><issn>0038-1101</issn><issn>1879-2405</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2015</creationdate><recordtype>article</recordtype><recordid>eNp9kM1LAzEQxYMoWKt_gLc9enDrZJP9KJ6k-FGo9KCCt5BmJ23KNlszaUH_elPq2dMww-895j3GrjmMOPDqbj0iwlEBXKZ9BBxO2IA39TgvJJSnbAAgmpwn9JxdEK0BoKg4DNjndLMN_R7b7HX-9vT4npmVDtpEDO5HR9f7LKJZefe1w8z2ISPnlx0eKO-xyzr0y7i6zcjoLnnEoD05in2gS3ZmdUd49TeH7CPZT17y2fx5OnmY5UYIiHktrKgsSruAhpe6lEW9qGXBK6nNGKzU0trWYIm1HEshDRethrZeNFqIUlgthuzm6JtipCcpqo0jg12nPfY7Uryqxk0jZVMnlB9RE3qigFZtg9vo8K04qEOLaq1Si-rQ4uGUWkya-6MGU4a9w6DIOPQGWxfQRNX27h_1L1-1e0Q</recordid><startdate>20150201</startdate><enddate>20150201</enddate><creator>Ferdousi, Fahmida</creator><creator>Rios, Rafael</creator><creator>Kuhn, Kelin J.</creator><general>Elsevier Ltd</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>7U5</scope><scope>8FD</scope><scope>H8D</scope><scope>L7M</scope></search><sort><creationdate>20150201</creationdate><title>Improved MOSFET characterization technique for single channel length, scaled transistors</title><author>Ferdousi, Fahmida ; Rios, Rafael ; Kuhn, Kelin J.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c330t-73f36fe4fb0815a5427b742164ac90f4a4ffdce5e749434c13da0d7b8a3353fa3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2015</creationdate><topic>Channels</topic><topic>Charge</topic><topic>Devices</topic><topic>Extraction</topic><topic>Gates</topic><topic>Mobility</topic><topic>MOSFETs</topic><topic>Nonlinear charge</topic><topic>Semiconductor devices</topic><topic>Source–drain resistance</topic><topic>Threshold voltage</topic><topic>Transistors</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Ferdousi, Fahmida</creatorcontrib><creatorcontrib>Rios, Rafael</creatorcontrib><creatorcontrib>Kuhn, Kelin J.</creatorcontrib><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Solid State and Superconductivity Abstracts</collection><collection>Technology Research Database</collection><collection>Aerospace Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>Solid-state electronics</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Ferdousi, Fahmida</au><au>Rios, Rafael</au><au>Kuhn, Kelin J.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Improved MOSFET characterization technique for single channel length, scaled transistors</atitle><jtitle>Solid-state electronics</jtitle><date>2015-02-01</date><risdate>2015</risdate><volume>104</volume><spage>44</spage><epage>46</epage><pages>44-46</pages><issn>0038-1101</issn><eissn>1879-2405</eissn><abstract>•Proposes correction to standard linear charge model to improve fitting at low Vgt.•Allows mobility, threshold voltage and Rsd extraction.•Applicable to scaled, single Lg transistors.
The MOSFET characterization technique proposed here permits parameter extraction from ultra-short channel single length devices. The technique is based on an improved charge correction which allows extension of the gate overdrive to lower range and leads to better accuracy of extracted quantities such as effective mobility, threshold voltage, and effective parasitic resistance. The method is applicable to both planar and non-planar technologies at highly scaled gate lengths.</abstract><pub>Elsevier Ltd</pub><doi>10.1016/j.sse.2014.10.010</doi><tpages>3</tpages></addata></record> |
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| ispartof | Solid-state electronics, 2015-02, Vol.104, p.44-46 |
| issn | 0038-1101 1879-2405 |
| language | eng |
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| source | Access via ScienceDirect (Elsevier) |
| subjects | Channels Charge Devices Extraction Gates Mobility MOSFETs Nonlinear charge Semiconductor devices Source–drain resistance Threshold voltage Transistors |
| title | Improved MOSFET characterization technique for single channel length, scaled transistors |
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