A Communication-aware Scheduling Algorithm for Hardware Task Scheduling Model on FPGA-based Reconfigurable Systems

Task scheduling is an important aspect of high performance reconfigurable computing. Most of the heuristics for this NP-hard problem are based on a simple abstract model of FPGA and have little investigation into optimizing data communication which influences the system performance importantly. To s...

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Veröffentlicht in:	Journal of computers 2014-11, Vol.9 (11), p.2552-2552
Hauptverfasser:	Sheng, Yingying, Liu, Yan, Li, Renfa, Xiao, Xiongren
Format:	Artikel
Sprache:	eng
Schlagworte:	Algorithms Communication systems Computer simulation Cost engineering Hardware Optimization Scheduling Task scheduling
Online-Zugang:	Volltext
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