A Communication-aware Scheduling Algorithm for Hardware Task Scheduling Model on FPGA-based Reconfigurable Systems
Task scheduling is an important aspect of high performance reconfigurable computing. Most of the heuristics for this NP-hard problem are based on a simple abstract model of FPGA and have little investigation into optimizing data communication which influences the system performance importantly. To s...
Gespeichert in:
Veröffentlicht in: | Journal of computers 2014-11, Vol.9 (11), p.2552-2552 |
---|---|
Hauptverfasser: | , , , |
Format: | Artikel |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | Task scheduling is an important aspect of high performance reconfigurable computing. Most of the heuristics for this NP-hard problem are based on a simple abstract model of FPGA and have little investigation into optimizing data communication which influences the system performance importantly. To solve this problem, a Communication-aware Maximum Adjacent Edges (CA-MAE) algorithm based on new 2D reconfigurable model is proposed, which could reduce communication distance during scheduling and enhance the system performance. The experimental results show that CA-MAE reduces communication cost by 17%. |
---|---|
ISSN: | 1796-203X 1796-203X |
DOI: | 10.4304/jcp.9.11.2552-2558 |