46.4: Self-Aligned Bottom-Gate Amorphous IGZO Thin Film Transistor using the Back Side Exposure Technique

In this work, we proposed new fabrication equipment for using the back side exposure technique in Gen.8 glass size and discussed a self‐alignment technique for fabrication of a‐IGZO TFTs which result in inverted staggered bottom gate devices, to simplify the OLED array processing. The Cgs of a‐IGZO TFTs with back side exposure process was lower about 40% than that of a a‐IGZO TFTs with typical process. The decrease in capacitance value of the back side exposure process a‐IGZO TFTs is because the overlap area between the gate and source/drain electrodes has become decrease. At Vds of 10V, the back side exposure process a‐IGZO TFTs represent μsat of 12.43 cm2/Vs, Vth of 0.75V, on‐current of 74.4uA, S‐Factor of 0.23V/dec.