Fully integrated Doherty power amplifier in CMOS 65 nm with constant PAE in Backoff
Design methodology and measurements results are presented for a Doherty power amplifier (DPA) fully integrated with its input/output network matching and choke inductances in 65 nm CMOS technology with constant PAE over a 7 dB backoff. Measurements from 2.4 to 2.6 GHz show constant PAE performance s...
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Veröffentlicht in: | Analog integrated circuits and signal processing 2015-01, Vol.82 (1), p.89-97 |
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Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | Design methodology and measurements results are presented for a Doherty power amplifier (DPA) fully integrated with its input/output network matching and choke inductances in 65 nm CMOS technology with constant PAE over a 7 dB backoff. Measurements from 2.4 to 2.6 GHz show constant PAE performance starting in 20 % level up to 24 % with a maximum output power of 23.4 dBm. The circuit is fully described with all components values and layout details for further reproduction. Performance graphs showing the active load-pull effect, sub-amplifiers behavior and constant PAE prove that it is a real DPA with all effects as known by the theory. The circuit is composed by only lumped components, each sub-amplifier has cascode topology and their input/output networks are optimized to save die area and to produce a constant PAE. |
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ISSN: | 0925-1030 1573-1979 |
DOI: | 10.1007/s10470-014-0451-5 |