86 Gbit/s SiGe receiver module with high sensitivity for 160 × 86 Gbit/s DWDM system

86 Gbit/s SiGe receiver module with high sensitivity for 160 × 86 Gbit/s DWDM system

A 86 Gbit/s SiGe receiver chip with an on-chip phase-locked loop and a preamplifier is presented. The chip is mounted and measured in a module assembly with RF-connectors. At the intended system data rate of 86 Gbit/s, A bit-error-free operation at a high input sensitivity of 50 mV^sub pp^ is demons...

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Veröffentlicht in:Electronics letters 2006-01, Vol.42 (1), p.1-1
Hauptverfasser: Dümler, U, Möller, M, Bielik, A, Ellermeyer, T, Langenhagen, H, Walthes, W, Mejri, J
Format: Artikel
Sprache:eng
Schlagworte:
Assembly
Chips
Clocks
High speed
Modules
Phase locked loops
Receivers
Silicon germanides
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Beschreibung
Zusammenfassung:A 86 Gbit/s SiGe receiver chip with an on-chip phase-locked loop and a preamplifier is presented. The chip is mounted and measured in a module assembly with RF-connectors. At the intended system data rate of 86 Gbit/s, A bit-error-free operation at a high input sensitivity of 50 mV^sub pp^ is demonstrated. With an external clock, high-speed capability is proven by error-free operation up to 100 Gbit/s.
ISSN:0013-5194
1350-911X