Row-column parallel turbo decoding of product codes
A row-column, parallel architecture of a turbo decoder dedicated to product codes is presented. This architecture enables simultaneous decoding of the row and the column of a block. The performance of the proposed row-column parallel turbo decoder is similar to that of a conventional turbo decoder....
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| Veröffentlicht in: | Electronics letters 2006-03, Vol.42 (5), p.1-1 |
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| Hauptverfasser: | , |
| Format: | Artikel |
| Sprache: | eng |
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| Online-Zugang: | Volltext |
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| Zusammenfassung: | A row-column, parallel architecture of a turbo decoder dedicated to product codes is presented. This architecture enables simultaneous decoding of the row and the column of a block. The performance of the proposed row-column parallel turbo decoder is similar to that of a conventional turbo decoder. However, this new architecture reduces the decoding latency by a factor of two. Moreover, the memory necessary for the block reconstruction between row decoding and column decoding is removed. |
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| ISSN: | 0013-5194 1350-911X |