High linearity 3.0-5.0 GHz ultrawideband CMOS up-conversion mixer with parallel capacitor

ABSTRACT A high linearity CMOS up‐conversion mixer at 3.0–5.0 GHz for ultrawideband applications is presented. The proposed design is implemented in TSMC 0.18‐μm CMOS technology. A Gilbert‐cell active double‐balanced mixer using a capacitor placed in parallel with the intrinsic gate‐source capacitor of a core mixer to improve linearity is used. To further improve the linearity and input matching, source degeneration inductors is used. In addition, a current injection is designed to increase gain and obtain low power. A 100 MHz intermediate frequency input signal is converted to a 3.0–5.0 GHz radio frequency input signal. The measured input third‐order intercept point (IIP3) is 13.5 dBm with a convention gain of 2.3 dB. Moreover, a low power of 7.1‐mWwith a 1.2‐V power supply is obtained. © 2015 Wiley Periodicals, Inc. Microwave Opt Technol Lett 57:427–429, 2015