Noise power normalisation: extension of g sub( m)/I sub( D) technique for noise analysis

MOSFET models for deep submicron technologies involve accurate and complex equations not suitable for hand analysis. Although the gm/ID design-oriented approach has overcome this limitation by combining hand calculations with data obtained from SPICE simu- lations, it has not been systematically used for noise calculations, since the dependence of noise on this parameter is not direct. An attempt to express noise as a function of gm/ID is presented. By introducing the normalised noise concept, noise curves that depend solely on the device length and operation point can be obtained directly from SPICE simulations, and then used in the design flow. The main outcome is a simple design-oriented methodology for noise calcu- lations that does not depend on equations for a specific technology or operating region, and that is easy to migrate among different technologies.