A Sub-1 V Transient-Enhanced Output-Capacitorless LDO Regulator With Push-Pull Composite Power Transistor

An output-capacitorless low-dropout (OCL-LDO) regulator with a push-pull composite power transistor is presented in this paper. Using the proposed composite transistor, the nondominant parasitic poles can be pushed to higher frequencies, leading to good stability. In addition, the slew rate limitati...

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Veröffentlicht in:IEEE transactions on very large scale integration (VLSI) systems 2014-11, Vol.22 (11), p.2297-2306
Hauptverfasser: Chong, Sau Siong, Chan, Pak Kwong
Format: Artikel
Sprache:eng
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Zusammenfassung:An output-capacitorless low-dropout (OCL-LDO) regulator with a push-pull composite power transistor is presented in this paper. Using the proposed composite transistor, the nondominant parasitic poles can be pushed to higher frequencies, leading to good stability. In addition, the slew rate limitation at the gate of the power transistor is improved greatly by the proposed push-pull structure. Implemented and fabricated in UMC 65-nm CMOS technology, the LDO regulator occupies only an active area of 0.0096 mm 2 . The experimental results have shown that the regulator is able to operate at VIN = 0.75 V and deliver a maximum load current of 50 mA with a dropout voltage of less than 250 mV. It consumes a quiescent current of 16.2 μA and is able to settle within 1.2 μs.
ISSN:1063-8210
1557-9999
DOI:10.1109/TVLSI.2013.2290702