Designing of Efficient Adders by using a Novel Reversible SDNG gate

In this paper, a new 4*4 reversible logic gate SDNG is proposed. The SDNG gate can be used to implement all types of classical Boolean applications like XOR, XNOR, NAND, NOR, AND, OR, and NOT. It can also be used to design various adders efficiently. One of the prominent functionalities of the SDNG gate is that it can work singly as a full adder or full subtractor, which is a versatile and widely used element in digital design. Thus, the proposed reversible full adder/subtractor contains only one gate. This paper also represents 4 bit parallel adder circuit, 4 bit parallel subtractor circuit, 2's complement adder-subtractor circuit, carry skip adder circuit, BCD adder circuit and carry skip BCD adder circuit which have been implemented by using the proposed SDNG reversible gate.