Optimal design for a high performance H-JLTFET using HfO sub(2) as a gate dielectric for ultra low power applications

In this paper we have proposed an optimal design for a hetero-junctionless tunnel field effect transistor (TFET) using HfO sub(2) as a gate dielectric. The device principle and performance are investigated using a 2D simulator. During this work, we investigated the transfer characteristics, output c...

Ausführliche Beschreibung

Bibliographische Detailangaben

Veröffentlicht in:	RSC advances 2014-05, Vol.4 (43), p.22803-22807
Hauptverfasser:	Asthana, Pranav Kumar, Ghosh, Bahniman, Mukund Rahi, Shiromani Bal, Goswami, Yogesh
Format:	Artikel
Sprache:	eng
Schlagworte:	Computer simulation Conductance Devices Dielectrics Gates Hafnium oxide Optimization Switching
Online-Zugang:	Volltext
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!