Thin silicon layer p-channel SOI/PSOI LDMOS with interface n+-islands for high voltage application

•P-channel SOI LDMOS with high BV is gradually followed with interest.•Thin silicon layer p-channel SOI/PSOI LDMOS with an BV>1000V has not been seen.•A p-channel SOI/PSOI LDMOS with interface n+-islands is studied in this paper.•BV>1000V is obtained for the PLDMOS on 1.5μm thin silicon layer and 2μm BOX.•Work mechanism and electrical characteristics of the PLDMOS are discussed. A novel thin silicon layer p-channel SOI/PSOI LDMOS with interface n+-islands (INI PLDMOS) is studied in this paper. Interface n+-islands can not only accumulate interface charges to enhance the electric field of buried oxide layer (BOX) (EBOX) and achieve a high breakdown voltage (BV), but also form double-RESURF effect with p- drift region and improve the trade-off of the specific on-resistance (Ron,sp) and BV. The work mechanism of the proposed p-channel LDMOS is discussed. BV>1000V is obtained for the INI PLDMOS based on a 1.5-μm silicon layer and 2-μm BOX.