An 8-level 3-bit cell programming technique in NOR-type nano-scaled SONOS memory devices

•An 8-level 3-bit cell programming technique is presented in SONOS memory devices.•This new programming mode enlarges one time programming and sensing window.•The storage density of the 8-level cell is greatly improved.•The cycling endurance and retention properties are not obviously degraded. An 8-...

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Veröffentlicht in:Microelectronics and reliability 2014-01, Vol.54 (1), p.331-334
Hauptverfasser: Xu, Yue, Wu, Chunbo, Ji, Xiaoli, Yan, Feng
Format: Artikel
Sprache:eng
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Zusammenfassung:•An 8-level 3-bit cell programming technique is presented in SONOS memory devices.•This new programming mode enlarges one time programming and sensing window.•The storage density of the 8-level cell is greatly improved.•The cycling endurance and retention properties are not obviously degraded. An 8-level 3-bit cell programming technique is presented in NOR-type nano-scaled polycrystalline silicon-oxide–nitride-oxide-silicon (SONOS) memory devices. This new operating mode provides the double programming and sensing window over the traditional 4-level cell programming by using a double-side hot hole injection erasing. Compared with the 4-level cell, the storage density of the 8-level cell is greatly improved. However, the cycling endurance and retention properties are not obviously degraded until 1000 program/erase cycling.
ISSN:0026-2714
1872-941X
DOI:10.1016/j.microrel.2013.09.020