Normally-off GaN MOSFETs with high-k dielectric CeO sub(2) films deposited by RF sputtering

This paper describes normally-off GaN MOSFETs with high-k dielectric CeO sub(2) films made by ion implantation. Ion implantation process reduces sheet and contact resistances of source and drain regions of this device. To obtain high I sub(dss) and g sub(mmax), high-k dielectric CeO sub(2) was used as gate oxide films for GaN MOSFETs for the first time. Nitrogen ion implantation isolation processes were also adopted to fabricate isolation region. Normally-off GaN MOSFETs with I sub(dss) of 350 mA/mm, g sub(mmax) of 40 mS/mm and threshold voltage of +0.5 V were obtained. The high Idss and normally-off mode show the potential and advantages of GaN MOSFETs for high voltage operations. ( copyright 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)