Aluminum-induced iso-epitaxy of silicon for low-temperature fabrication of centimeter-large p+n junctions

► Aluminum-induced crystallization (AIC) of Si is achieved on centimeter-large areas at 400 °C. ► Complete isoepitaxy of Si is achieved by dedicated wet-etching and Marangoni drying of the substrate surface. ► The full coverage by p+ Solid Phase Epitaxy of Si is confirmed by material analysis. ► P+n diodes have been fabricated by using AIC process for forming p+ anodes. ► P+n diodes with 1 × 1 cm2 areas have ideality factors of 1.02 and leakage of a few nA/cm2. Aluminum-induced crystallization of Si is achieved on crystalline Si substrates in a manner that produces near-ideal p+n diodes for centimeter large sizes. A layer-stack of physical-vapor-deposited materials, amorphous Si on aluminum, is inverted at an anneal temperature of 400°C to form a monocrystalline p-doped Si layer by solid-phase epitaxy (SPE). The stages of the crystallization process are been reviewed here and studied with respect to the filling of the large-area SPE Si layers. It is shown that a complete iso-epitaxy coverage of large areas is possible if the starting c-Si substrate is free of nucleation centers. This can be achieved by appropriate wet-etching of the oxide to the Si followed by diluted HF dip-etching and Marangoni drying before deposition of the Al mediator layer and α-Si layer. Near-ideal p+n diodes have been fabricated at 400°C with areas up to 1×1cm2, having ideality factors down to 1.02 and low leakage currents of a few nA/cm2. From temperature-dependent measurements it can be concluded that the dominant origin of the leakage current is from ideal diffusion over the depletion regions and not from defect-related generation–recombination currents. The full coverage by p+ SPE-Si is confirmed by material analysis.