A 10 dBm-25 dBm, 0.363 mm super( 2) TWO STAGE 130 nm RF CMOS POWER AMPLIFIER

This article proposes a 2.4 GHz RF CMOS Power amplifier and variation in its main performance parameters ie, output power, S-parameters and power added efficiency with respect to change in supply voltage and size of the power stage transistor. The supply voltage was varied form 1 V to 5 V, and the r...

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Veröffentlicht in:International journal of VLSI design & communication systems 2013-10, Vol.4 (5), p.107-107
Hauptverfasser: Sahu, Shridhar R, Deshmukh, A Y
Format: Artikel
Sprache:eng
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Zusammenfassung:This article proposes a 2.4 GHz RF CMOS Power amplifier and variation in its main performance parameters ie, output power, S-parameters and power added efficiency with respect to change in supply voltage and size of the power stage transistor. The supply voltage was varied form 1 V to 5 V, and the range of output power at 1dB compression point was found to be from 10.684 dBm to 25.08 dBm, respectively. The range of PAE is 16.65% to 48.46%. The width of the power stage transistor was varied from 150 mu m to 500 mu m to achieve output power of range 15.47 dBm to 20.338 dBm. The range of PAE obtained here is 29.085% to 45.439%. The total dimension of the layout comes out to be 0.714* 0.508 mm super( 2).
ISSN:0976-1527
0976-1357