A 10 Gb/s burst-mode clock and data recovery circuit

We introduce a gated oscillator based on XONR/XOR cells and illustrate its working process. A halfrate BM-CDR circuit based on the proposed oscillator is designed, and the design is implemented in SMIC 0.13 mu m CMOS technology occupying an area of 675 x 25 mu m super(2). The measured results show t...

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Veröffentlicht in:	Journal of semiconductors 2012-07, Vol.33 (7), p.75011-1-5
Hauptverfasser:	Gu, Gaowei, Zhu, En, Lin, Ye, Liu, Wensong
Format:	Artikel
Sprache:	eng
Schlagworte:	Bursting Circuits Clocks CMOS Data recovery Oscillators Semiconductors
Online-Zugang:	Volltext
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