A 400-MS/s 12-bit current-steering D/A converter
This paper presents a 400-MS/s 12-bit CMOS current-steering digital-to-analog converter (DAC). The proposed DAC adapts 6+2+4 segmented architecture and a modified switching scheme to improve dynamic and static performance. The measured spurious-free dynamic range is up to 77.18 dB at 400 MS/s with a...
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Veröffentlicht in: | Journal of semiconductors 2012-08, Vol.33 (8), p.85006-1-5 |
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Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | This paper presents a 400-MS/s 12-bit CMOS current-steering digital-to-analog converter (DAC). The proposed DAC adapts 6+2+4 segmented architecture and a modified switching scheme to improve dynamic and static performance. The measured spurious-free dynamic range is up to 77.18 dB at 400 MS/s with a 10 MHz input signal. The full-scale output current is 20 mA with a 1.8 V single power supply. The core area occupies 0.6 mm super(2) in a standard 1P-6M 0.18- mu m CMOS process. |
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ISSN: | 1674-4926 |
DOI: | 10.1088/1674-4926/33/8/085006 |