A low-power multi port register file design using a low-swing strategy
a low-power register file is designed by using a low-swing strategy and modified NAND address decoders. The proposed low-swing strategy is based on the feedback scheme and uses dynamic logic to reduce the active feedback power.This method contains two parts:WRITE and READ strategy.In the WRITE low-s...
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Veröffentlicht in: | Journal of semiconductors 2012-03, Vol.33 (3), p.101-108 |
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Hauptverfasser: | , , , , |
Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | a low-power register file is designed by using a low-swing strategy and modified NAND address decoders. The proposed low-swing strategy is based on the feedback scheme and uses dynamic logic to reduce the active feedback power.This method contains two parts:WRITE and READ strategy.In the WRITE low-swing scheme,the modified memory cell is used to support low-swing WRITE.The modified NAND decoder not only dissipates less power,but also enables a great deal of area reduction.Compared with the conventional single-ended register file,the low-swing strategy saves 34.5%and 51.15%bit-line power in WRITE and READ separately.The post simulation results indicate a 39.4%power improvement when the twelve ports are all busy. |
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ISSN: | 1674-4926 |
DOI: | 10.1088/1674-4926/33/3/035009 |