MODELING AND SIMULATION OF A NOVEL SERIES/PARALLEL VOLTAGE SOURCES MULTILEVEL INVERTER

In this paper, a new topology of cascaded multilevel inverter with a high number of steps associated with a low number of switches is presented. A multilevel voltage is obtained by cascading two H-bridges and an inverter. Voltage sources are connected in series/parallel by the switching devices. The size, complexity and power consumption in the gate driving circuits is also reduced. Reduction of rating of the switches is another advantage. The total harmonic distortion (THD) is reduced with more number of steps in output voltage without using pulse width modulation techniques. The proposed setup configures theoretical approach along with simulations carried on MATLAB/SIMULINK environment. Simulation results are shown and compared with theoretical results.