A High Dynamic-Range RF Programmable-Gain Front End for G.hn RF-Coax in 65-nm CMOS

A high-dynamic-range programmable-gain inductorless RF front end suitable for the RF-coax bandplan of the G.hn recommendation is presented. A double-input RF programmable gain amplifier (DI-RFPGA) with switchable capacitive attenuation providing four gain settings is used at the input, followed by a current reuse transconductance amplifier (CR-TCA) and a switching stage for frequency downconversion. Besides the gain configurability provided by the DI-RFPGA, the front end adds an additional configuration mechanism by allowing the bypass of the CR-TCA, connecting the DI-RFPGA directly to the switching stage, and thereby providing a total of eight gain settings. The different sets of specifications result in a signal-to-noise-plus-distortion ratio larger than 37 dB for an input power range from -78 to 5 dBm with a bandwidth from 300 MHz to 2.5 GHz. The chip is fabricated in a 65-nm CMOS technology and consumes between 31.8-46.8 mW. The RF front end achieves a voltage gain range of 39.2 dB, with a maximum voltage gain of 25.2 dB, a minimum noise figure of 5.5 dB, and a maximum third-order intermodulation intercept point of 24.2 dBm. The circuit occupies a total area of 0.119 mm 2 .