All-Digital PLL With Ultra Fast Settling

A fully digital frequency synthesizer for RF wireless applications has recently been proposed. At its foundation lies a digitally controlled oscillator with sufficiently fine frequency resolution to avoid analog tuning. The conventional phase/frequency detector, charge pump and RC loop filter are re...

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Veröffentlicht in:IEEE transactions on circuits and systems. 2, Analog and digital signal processing Analog and digital signal processing, 2007-02, Vol.54 (2), p.181-185
Hauptverfasser: Staszewski, R.B., Balsara, P.T.
Format: Artikel
Sprache:eng
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Zusammenfassung:A fully digital frequency synthesizer for RF wireless applications has recently been proposed. At its foundation lies a digitally controlled oscillator with sufficiently fine frequency resolution to avoid analog tuning. The conventional phase/frequency detector, charge pump and RC loop filter are replaced by a time-to-digital converter and a simple digital loop filter. When implemented in highly scaled digital CMOS processes, the proposed architecture is more advantageous over conventional charge-pump-based phase-locked loops (PLLs) since it exploits signal processing capabilities of digital circuits and avoids relying on the fine voltage resolution of analog circuits. In this brief, we present novel techniques used in the all-digital PLL to achieve an ultra-fast frequency acquisition of
ISSN:1549-7747
1057-7130
1558-3791
DOI:10.1109/TCSII.2006.886896