Germanium-on-SOI Infrared Detectors for Integrated Photonic Applications
An overview of recent results on high-speed germanium-on-silicon-on-insulator (Ge-on-SOI) photodetectors and their prospects for integrated optical interconnect applications are presented. The optical properties of Ge and SiGe alloys are described and a review of previous research on SOI and SiGe de...
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Veröffentlicht in: | IEEE journal of selected topics in quantum electronics 2006-11, Vol.12 (6), p.1489-1502 |
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Zusammenfassung: | An overview of recent results on high-speed germanium-on-silicon-on-insulator (Ge-on-SOI) photodetectors and their prospects for integrated optical interconnect applications are presented. The optical properties of Ge and SiGe alloys are described and a review of previous research on SOI and SiGe detectors is provided as a motivation for the Ge-on-SOI detector approach. The photodetector design is described, which consists of lateral alternating p- and n-type surface contacts on an epitaxial Ge absorbing layer grown on an ultrathin-SOI substrate. When operated at a bias voltage of -0.5 V, 10mumtimes10 mum devices have dark current I dark , of only ~10 nA, a value that is nearly independent of finger spacing S, between S=0.3mum and 1.3mum. Detectors with S=1.3mum have external quantum efficiencies eta, of 52% (38%) at lambda=895 nm (850 nm) with corresponding responsivities of 0.38 A/W (0.26 A/W). The wavelength-dependence of eta agrees fairly well with expectations, except at longer wavelengths, where Si up-diffusion into the Ge absorbing layer reduces the efficiency. Detectors with 10 mumtimes10 mum area and S=0.6mum have -3-dB bandwidths as high as 29 GHz, and can simultaneously achieve a bandwidth of 27 GHz with I dark =24 nA, at a bias of only -1 V, while maintaining high efficiency of eta=46%(33%), at lambda=895 nm (850 nm). Analysis of the finger spacing and area-dependence of the device speed indicates that the performance at large finger spacing is transit-time-limited, while at small finger spacing, RC delays limit the bandwidth. Methods to improve the device performance are presented, and it is shown that significant improvement in the speed and efficiency both at lambda=850 and 1300 nm can be expected by optimizing the layer structure design |
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ISSN: | 1077-260X 1558-4542 |
DOI: | 10.1109/JSTQE.2006.883160 |